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_______________________________________________________________ maxim integrated products 1 for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxims website at www.maxim-ic.com. dual 256-tap, volatile, low-voltage linear taper digital potentiometers MAX5391/max5393 19-5035; rev 0; 10/09 ordering information general description the MAX5391/max5393 dual 256-tap, volatile, low- voltage linear taper digital potentiometers offer three end-to-end resistance values of 10k i , 50k i , and 100k i . operating from a single +1.7v to +5.5v power sup - ply, these devices provide a low 35ppm/ n c end-to-end temperature coefficient. the devices feature an spi k interface. the small package size, low supply voltage, low sup - ply current, and automotive temperature range of the MAX5391/max5393 make the devices uniquely suitable for the portable consumer market, battery backup indus - trial applications, and the automotive market. the MAX5391/max5393 include two digital potentio- meters in a voltage-divider configuration. the MAX5391/ max5393 are specified over the -40 n c to +125 n c auto - motive temperature range and are available in a 16-pin, 3mm x 3mm tqfn and a 14-pin tssop package, respectively. applications low-voltage battery applications portable electronics mechanical potentiometer replacement offset and gain control adjustable voltage references/linear regulators automotive electronics features s dual 256-tap linear taper positions s single +1.7v to +5.5v supply operation s low 12a quiescent supply current s 10k i , 50k i , and 100k i end-to-end resistance values s spi-compatible interface s wiper set to midscale on power-up s -40 n c to +125 n c operating temperature range spi is a trademark of motorola, inc. note: all devices are specified in the -40 n c to +125 n c tem - perature range. + denotes a lead(pb)-free/rohs-compliant package * ep = exposed pad. functional diagram evaluation kit available part pin-package end-to-end resistance (k i ) MAX5391 late+ 16 tqfn-ep* 10 MAX5391mate+ 16 tqfn-ep* 50 MAX5391nate+ 16 tqfn-ep* 100 max5393 laud+ 14 tssop 10 max5393maud+ 14 tssop 50 max5393naud+ 14 tssop 100 latch spi charge pump cs sclk din byp gnd v dd 256 decoder 256 decoder wa ha la hb wb lb latch por MAX5391 max5393
dual 256-tap, volatile, low-voltage linear taper digital potentiometers MAX5391/max5393 2 ______________________________________________________________________________________ stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. v dd to gnd ........................................................... -0.3v to +6v h_, w_, l_ to gnd ...................................... -0.3v to the lower of (v dd + 0.3v) or +6v all other pins to gnd ............................................. -0.3v to +6v continuous current into h_, w_, and l_ MAX5391l/max5393l ................................................... q 5ma MAX5391m/max5393m ................................................. q 2ma MAX5391n/max5393n ................................................. q 1ma continuous power dissipation (t a = +70 n c) 14-pin tssop (derate 10mw/ n c above +70 n c) ...... 796.8mw 16-pin tqfn (derate 14.7mw/ n c above +70 n c) ... 1176.5mw operating temperature range ....................... -40 n c to +125 n c junction temperature .................................................... +150 n c storage temperature range ............................ -65 n c to +150 n c lead temperature (soldering, 10s) ................................ +300 n c electrical characteristics (v dd = +1.7v to +5.5v, v h_ = v dd , v l_ = gnd, t a = t min to t max , unless otherwise noted. typical values are at v dd = +1.8v, t a = +25 n c.) (note 1) absolute maximum ratings parameter symbol conditions min typ max units resolution n 256 tap dc performance (voltage-divider mode) integral nonlinearity inl (note 2) -0.5 +0.5 lsb differential nonlinearity dnl (note 2) -0.5 +0.5 lsb dual-code matching register a = register b -0.5 +0.5 lsb ratiometric resistor tempco ( d v w /v w )/ d t, no load 5 ppm/ n c full-scale error code = ffh MAX5391l/max5393l -3 -2.2 lsb MAX5391m/max5393m -1 -0.6 MAX5391n/max5393n -0.5 -0.3 zero-scale error code = 00h MAX5391l/max5393l 2.2 3 lsb MAX5391m/max5393m 0.6 1 MAX5391n/max5393n 0.3 0.5 dc performance (variable resistor mode) integral nonlinearity r-inl (note 3) -1.0 +1.5 lsb differential nonlinearity r-dnl (note 3) -0.5 +0.5 lsb dc performance (resistor characteristics) wiper resistance r wl (note 4) 200 i terminal capacitance c h _, c l _ measured to gnd 10 pf wiper capacitance c w _ measured to gnd 50 pf end-to-end resistor tempco tc r no load 35 ppm/ n c end-to-end resistor tolerance d r hl wiper not connected -25 +25 % ac performance crosstalk (note 5) -90 db -3db bandwidth bw code = 08h, 10pf load, v dd = 1.8v MAX5391l/max5393l 600 khz MAX5391m/max5393m 100 MAX5391n/max5393n 50 total harmonic distortion plus noise thd+n measured at w, v h_ = 1v rms at 1khz 0.02 % wiper settling time (note 6) t s MAX5391l/max5393l 400 ns MAX5391m/max5393m 1200 MAX5391n/max5393n 2200
dual 256-tap, volatile, low-voltage linear taper digital potentiometers MAX5391/max5393 _______________________________________________________________________________________ 3 electrical characteristics (continued) (v dd = +1.7v to +5.5v, v h_ = v dd , v l_ = gnd, t a = t min to t max , unless otherwise noted. typical values are at v dd = +1.8v, t a = +25 n c.) (note 1) note 1: all devices are 100% production tested at t a = +25 n c. specifications over temperature limits are guaranteed by design and characterization. note 2: dnl and inl are measured with the potentiometer configured as a voltage-divider (figure 1) with h_ = v dd and l_ = gnd. the wiper terminal is unloaded and measured with a high-input-impedance voltmeter. note 3: r-dnl and r-inl are measured with the potentiometer configured as a variable resistor (figure 1). dnl and inl are measured with the potentiometer configured as a variable resistor. h_ is unconnected and l_ = gnd. for v dd = +5v, the wiper terminal is driven with a source current of 400 f a for the 10k i configuration, 80 f a for the 50k i configuration, and 40 f a for the 100k i configuration. for v dd = +1.7v, the wiper terminal is driven with a source current of 150 f a for the 10k i configuration, 30 f a for the 50k i configuration, and 15 f a for the 100k i configuration. note 4: the wiper resistance is the value measured by injecting the currents given in note 3 into w_ with l_ = gnd. r w_ = (v w_ - v h_ )/i w_ . note 5: drive ha with a 1khz gnd to v dd amplitude tone. la = lb = gnd. no load. wb is at midscale with a 10pf load. measure wb. note 6: the wiper-settling time is the worst-case 0 to 50% rise time, measured between tap 0 and tap 127. h_ = v dd , l_ = gnd, and the wiper terminal is loaded with 10pf capacitance to ground. note 7: digital timing is guaranteed by design and characterization, not production tested. parameter symbol conditions min typ max units charge-pump feedthrough at w_ v rw f clk = 600khz, c out = 0nf 200 nv p-p power supplies supply voltage range v dd 1.7 5.5 v standby current v dd = 5.5v 27 f a v dd = 1.7v 12 digital inputs minimum input high voltage v ih v dd = 2.6v to 5.5v 70 % x v dd v dd = 1.7v to 2.6v 75 maximum input low voltage v il v dd = 2.6v to 5.5v 30 % x v dd v dd = 1.7v to 2.6v 25 input leakage current -1 +1 f a input capacitance 5 pf timing characteristicsspi (note 7) sclk frequency f max 10 mhz sclk clock period t cp 100 ns sclk pulse-width high t ch 40 ns sclk pulse-width low t cl 40 ns cs fall to sck rise setup time t css 40 ns sclk rise to cs rise hold time t csh 0 ns din setup time t ds 40 ns din hold time t dh 0 ns sclk rise to cs fall delay t cs0 10 ns sclk rise to sclk rise hold time t cs1 40 ns cs pulse-width high t csw 100 ns
dual 256-tap, volatile, low-voltage linear taper digital potentiometers MAX5391/max5393 4 ______________________________________________________________________________________ typical operating characteristics (v dd = 1.8 v, t a = +25 n c, unless otherwise noted.) figure 1. voltage-divider and variable resistor configurations supply current vs. temperature MAX5391 toc01 temperature (c) supply current (a) 110 95 80 65 50 35 20 5 -10 -25 5 10 15 20 25 30 v dd = 5v v dd = 2.6v v dd = 1.8v 0 -40 125 supply current vs. digital input voltage MAX5391 toc02 digital input voltage (v) supply current (a) 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 10 100 1000 10,000 1 0 5.0 v dd = 2.6v v dd = 1.8v v dd = 5v supply current vs. supply voltage MAX5391 toc03 v dd (v) i dd (a) 5.2 4.7 4.2 3.7 3.2 2.7 2.2 15 20 25 30 10 1.7 resistance (w_-to-l_) vs. tap position (10ki) MAX5391 toc04 tap position w-to-l resistance (ki) 1 2 3 4 5 6 7 8 9 10 0 204 153 102 51 0 255 resistance (w_-to-l_) vs. tap position (50ki) MAX5391 toc05 tap position w-to-l resistance (ki) 5 10 15 20 25 30 35 40 45 50 0 204 153 102 51 0 255 resistance (w_-to-l_) vs. tap position (100ki) MAX5391 toc06 tap position w-to-l resistance (ki) 10 20 30 40 50 60 70 80 90 100 0 204 153 102 51 0 255 h l w w n.c. l
dual 256-tap, volatile, low-voltage linear taper digital potentiometers MAX5391/max5393 _______________________________________________________________________________________ 5 typical operating characteristics (continued) (v dd = 1.8 v, t a = +25 n c, unless otherwise noted.) wiper resistance vs. wiper voltage wiper voltage (v) wiper resistance (i) 0.5 80 100 120 140 60 0 1.0 MAX5391 toc07 v dd = 5v v dd = 2.6v v dd = 1.8v 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 end-to-end resistance percentage change vs. temperature MAX5391 toc08 temperature (c) end-to-end resistance % change 110 95 -25 -10 5 35 50 65 20 80 -0.02 -0.01 0 0.01 0.02 0.03 0.04 0.05 100k i 10k i 50k i -0.03 -40 125 variable resistor dnl vs. tap position (10ki) MAX5391 toc09 tap position dnl (lsb) 204 153 102 51 -0.08 -0.06 -0.04 -0.02 0 0.02 0.04 0.06 0.08 0.10 -0.10 0 255 i wiper = 150a variable resistor dnl vs. tap position (50ki) MAX5391 toc10 tap position dnl (lsb) 204 153 102 51 -0.08 -0.06 -0.04 -0.02 0 0.02 0.04 0.06 0.08 0.10 -0.10 0 255 i wiper = 30a variable resistor dnl vs. tap position (100ki) MAX5391 toc11 tap position dnl (lsb) 204 153 102 51 -0.08 -0.06 -0.04 -0.02 0 0.02 0.04 0.06 0.08 0.10 -0.10 0 255 i wiper = 15a variable resistor inl vs. tap position (10ki) MAX5391 toc12 tap position inl (lsb) 204 153 102 51 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1.0 -1.0 0 255 i wiper = 150a variable resistor inl vs. tap position (50ki) MAX5391 toc13 tap position inl (lsb) 204 153 102 51 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 0.5 -0.5 0 255 i wiper = 30a variable resistor inl vs. tap position (100ki) MAX5391 toc14 tap position inl (lsb) 204 153 102 51 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 0.5 -0.5 0 255 i wiper = 15a voltage-divider dnl vs. tap position (10ki) MAX5391 toc15 tap position dnl (lsb) 204 153 102 51 -0.08 -0.06 -0.04 -0.02 0 0.02 0.04 0.06 0.08 0.10 -0.10 0 255
dual 256-tap, volatile, low-voltage linear taper digital potentiometers MAX5391/max5393 6 ______________________________________________________________________________________ typical operating characteristics (continued) (v dd = 1.8 v, t a = +25 n c, unless otherwise noted.) voltage-divider dnl vs. tap position (50ki) MAX5391 toc16 tap position dnl (lsb) 204 153 102 51 -0.08 -0.06 -0.04 -0.02 0 0.02 0.04 0.06 0.08 0.10 -0.10 0 255 voltage-divider dnl vs. tap position (100ki) MAX5391 toc17 tap position dnl (lsb) 204 153 102 51 -0.08 -0.06 -0.04 -0.02 0 0.02 0.04 0.06 0.08 0.10 -0.10 0 255 voltage-divider inl vs. tap position (10ki) MAX5391 toc18 tap position inl (lsb) 204 153 102 51 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 0.5 -0.5 0 255 voltage-divider inl vs. tap position (50ki) MAX5391 toc19 tap position inl (lsb) 204 153 102 51 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 0.5 -0.5 0 255 voltage-divider inl vs. tap position (100ki) MAX5391 toc20 tap position inl (lsb) 204 153 102 51 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 0.5 -0.5 0 255 tap-to-tap switching transient (code 127 to code 128) (10ki) MAX5391 toc21 v w_-l_ 20mv/div cs 5v/div 400ns/div tap-to-tap switching transient (code 127 to code 128) (50ki) MAX5391 toc22 v w_-l_ 20mv/div 1s/div cs 5v/div tap-to-tap switching transient (code 127 to code 128) (100ki) MAX5391 toc23 v w_-l_ 20mv/div 1 s/div cs 5v/div MAX5391m p0wer-on transient MAX5391 toc24 v w_-l_ 1v/div v dd 5v/div 2 s/div
dual 256-tap, volatile, low-voltage linear taper digital potentiometers MAX5391/max5393 _______________________________________________________________________________________ 7 typical operating characteristics (continued) (v dd = 1.8 v, t a = +25 n c, unless otherwise noted.) midscale frequency response (10ki) frequency (khz) gain (db) 100 1 -20 -10 0 10 -30 0.01 10k MAX5391 toc25 v dd = 1.8v v dd = 5v v in = 1v p-p midscale frequency response (50ki) frequency (khz) gain (db) 100 1 -20 -10 0 10 -30 0.01 10k MAX5391 toc26 v dd = 1.8v v dd = 5v v in = 1v p-p midscale frequency response (100ki) frequency (khz) gain (db) 100 1 -20 -10 0 10 -30 0.01 10k MAX5391 toc27 v dd = 1.8v v dd = 5v v in = 1v p-p crosstalk vs. frequency MAX5391 toc28 frequency (khz) crosstalk (db) 100 10 1 0.1 -120 -100 -80 -60 -40 -20 0 -140 0.01 1000 100k i 50k i 10k i byp ramp vs. c byp MAX5391 toc30 capacitance (f) ramp time (ms) 0.08 0.05 0.04 0.02 20 40 60 80 100 120 0 0 0.10 total harmonic distortion plus noise vs. frequency MAX5391 toc29 frequency (khz) thd+n (%) 10 1 0.1 0.02 0.04 0.06 0.08 0.10 0.12 0.14 0.16 0.18 0.20 0 0.01 100 10k i 50k i 100k i charge-pump feedthrough at w_ vs. c byp MAX5391 toc31 capacitance (pf) voltage (nv rms ) 600 400 200 100 200 300 400 500 600 700 0 0 800
dual 256-tap, volatile, low-voltage linear taper digital potentiometers MAX5391/max5393 8 ______________________________________________________________________________________ pin description pin configurations pin name function MAX5391 (tqfn-ep) max5393 (tssop) 1 3 hb resistor b high terminal. the voltage at hb can be higher or lower than the voltage at lb. current can flow into or out of hb. 2 4 wb resistor b wiper terminal 3 2 lb resistor b low terminal. the voltage at lb can be higher or lower than the voltage at hb. current can flow into or out of lb. 4 5 i.c. internally connected. connect to gnd. 5 1 gnd ground 6, 11, 13 10 n.c. no connection. not internally connected. 7 6 byp internal power-supply bypass. for additional charge-pump filtering, bypass to gnd with a capacitor close to the device. 8 7 cs active-low chip-select input 9 8 din serial-interface data input 10 9 sclk serial-interface clock input 12 11 v dd power-supply input. bypass v dd to gnd with a 0.1 f f capacitor close to the device. 14 13 ha resistor a high terminal. the voltage at ha can be higher or lower than the voltage at la. current can flow into or out of ha. 15 12 wa resistor a wiper terminal 16 14 la resistor a low terminal. the voltage at la can be higher or lower than the voltage at ha. current can flow into or out of la. ep exposed pad (MAX5391 only). connect to gnd. 15 16 14 13 6 5 7 wb i.c. 8 hb n.c. din v dd 1 2 ha 4 12 11 9 wa la byp n.c. gnd *ep *ep = exposed pad MAX5391 lb sclk 3 10 n.c. top view cs + 14 13 12 11 10 9 8 1 2 3 4 5 6 7 la ha wa v dd wb hb lb gnd top view max5393 n.c. sclk din cs byp i.c. +
dual 256-tap, volatile, low-voltage linear taper digital potentiometers MAX5391/max5393 _______________________________________________________________________________________ 9 detailed description the MAX5391/max5393 dual 256-tap, volatile, low-volt - age linear taper digital potentiometers offer three end-to- end resistance values of 10k i , 50k i , and 100k i . each potentiometer consists of 255 fixed resistors in series between terminals h_ and l_. the potentiometer wiper, w_, is programmable to access any one of the 256 tap points on the resistor string. the potentiometers in each device are programmable independently of each other. the MAX5391/max5393 feature an spi interface. charge pump the MAX5391/max5393 contain an internal charge pump that guarantees the maximum wiper resistance, r wl , to be less then 200 i for supply voltages down to 1.7v. pins h_, w_, and l_ are still required to be less than v dd + 0.3v. a bypass input, byp, is provided to allow additional filtering of the charge-pump output, fur - ther reducing clock feed through that may occur on h_, w_, or l_. the nominal clock rate of the charge pump is 600khz. byp should remain resistively unloaded as any additional load would produce a ripple of approxi - mately i byp /(600khz x c byp ) volts. see the charge- pump feedthrough at w_ vs. c byp graph in the typical operating characteristics for c byp sizing guidelines with respect to clock feedthrough to the wiper. the value of c byp does affect the startup time of the charge pump; however, c byp does not impact the ability to commu - nicate with the device, nor is there a minimum c byp requirement. the maximum wiper impedance specifi - cation is not guaranteed until the charge pump is fully settled. see the byp ramp vs. c byp graph in the typical operating characteristics for c byp impact on charge- pump settling time. spi digital interface the MAX5391/max5393 include a spi interface that pro - vides a 3-wire write-only serial-data interface to control the wiper tap position through inputs chip select ( cs ), data in (din), and data clock (sclk). drive cs low to load data from din synchronously into the serial shift register on the rising edge of each sclk pulse. the MAX5391/max5393 load the last 10 bits of clocked data into the appropriate potentiometer control register once cs transitions high. see figures 2 and 3. data written to a memory register immediately updates the wiper position. keep cs low during the entire data stream to prevent the data from being terminated. the first two bits a1:a0 (address bits) address one of the two potentiometers. see table 1. the power-on reset (por) circuitry sets the wiper to midscale. table 1. spi register map figure 2. spi digital interface format bit number 1 2 3 4 5 6 7 8 9 10 bit name a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 write wiper register a 0 0 d7 d6 d5 d4 d3 d2 d1 d0 write wiper register b 0 1 d7 d6 d5 d4 d3 d2 d1 d0 write to both a and b 1 1 d7 d6 d5 d4 d3 d2 d1 d0 cs command started 10-bit sclk din a0 a1 d7 d6 d5 d4 d3 d2 d0 d1 wiper register loaded
dual 256-tap, volatile, low-voltage linear taper digital potentiometers MAX5391/max5393 10 _____________________________________________________________________________________ reg a: the data byte writes to register a, and the wiper of potentiometer a moves to the appropriate position at the rising edge of cs . d[7:0] indicates the position of the wiper. d[7:0] = 00h moves the wiper to the position clos - est to la. d[7:0] = ffh moves the wiper closest to ha. d[7:0] is 80h following power-on. reg b: the data byte writes to register b, and the wiper of potentiometer b moves to the appropriate position at the rising edge of cs . d[7:0] indicates the position of the wiper. d[7:0] = 00h moves the wiper to the position clos - est to lb. d[7:0] = ffh moves the wiper to the position closest to hb. d[7:0] is 80h following power-on. reg a and b: the data byte writes to registers a and b, and the wipers of potentiometers a and b move to the appropriate position. d[7:0] indicates the position of the wiper. d[7:0] = 00h moves the wiper to the position clos - est to l_. d[7:0] = ffh moves the wiper to the position closest to h_. d[7:0] is 80h following power-on. applications information variable gain amplifier figure 4 shows a potentiometer adjusting the gain of a noninverting amplifier. figure 5 shows a potentiometer adjusting the gain of an inverting amplifier. adjustable dual regulator figure 6 shows an adjustable dual linear regulator using a dual potentiometer as two variable resistors. adjustable voltage reference figure 7 shows an adjustable voltage reference circuit using a potentiometer as a voltage divider. figure 3. spi timing diagram sclk cs din t cso t css t cl t ds t dh t ch t csw t cs1 t csh t cp
dual 256-tap, volatile, low-voltage linear taper digital potentiometers MAX5391/max5393 ______________________________________________________________________________________ 11 figure 4. variable-gain noninverting amplifier figure 5. variable-gain inverting amplifier figure 6. adjustable dual linear regulator figure 7. adjustable voltage reference v in v out h_ l_ w_ v in v out h_ l_ w_ v out1 v out2 out1 out2 set1 set2 in v+ l_ l_ h_ h_ w_ w_ max8866 out in +2.5v v ref gnd l_ h_ w_ max6037
dual 256-tap, volatile, low-voltage linear taper digital potentiometers MAX5391/max5393 12 _____________________________________________________________________________________ variable-gain current-to-voltage converter figure 8 shows a variable-gain current-to-voltage con - verter using a potentiometer as a variable resistor. lcd bias control figure 9 shows a positive lcd bias control circuit using a potentiometer as a voltage-divider. programmable filter figure 10 shows a programmable filter using a dual potentiometer. offset voltage adjustment circuit figure 11 shows an offset voltage adjustment circuit using a dual potentiometer. process information process: bicmos figure 8. variable gain i-to-v converter figure 9. positive lcd bias control using a voltage-divider figure 10. programmable filter figure 11. offset voltage adjustment circuit l_ r1 r2 r3 v out i s h_ w_ v out = i s x ((r3 x (1 + r2/r1)) + r2) l_ v out h_ w_ +1.8v v out v in la ha wb lb hb r2 r1 r3 wa v out lb hb wb wa la ha v in +1.8v
dual 256-tap, volatile, low-voltage linear taper digital potentiometers MAX5391/max5393 maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circuit patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 13 ? 2009 maxim integrated products maxim is a registered trademark of maxim integrated products, inc. package type package code document no. 14 tssop u14+1 21-0066 16 tqfn-ep t1633+5 21-0136 package information for the latest package outline information and land patterns, go to www.maxim-ic.com/packages . note that a +, #, or - in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status.

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